PD-97745

Характеристики

Грузоподъёмность

нет данных

Вылет

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Повторяемость позиционирования

нет данных

Масса

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Степень защиты

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Характеристики из источника

Строки приведены так, как их печатает производитель: без перевода, пересчёта и сравнения.

PD‐97745

12 A (Highly Integrated SupIRBuck)

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OUTPUT VOLTAGE TRACKING AND SEQUENCING

5 V (< Vin < 21V)

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Enable

1.2 V (1.0V 0.5 V)

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Simultaneous Ramp up RE/RF

0 V

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These components can be described as

0 dB (crossing frequency and adequate phase margin (greater)

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Vcc/

6.4 V

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Accuracy

0 °C (< Tj < 70°C ‐0.5 +0.5)

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Vin = 12V, Vin slew rate max = 1.80

1 V (/µs, Note 4)

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 Small Size

5mm x 6 mm (PQFN)

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and is compensated according to the IC temperature. So at

0.15 V

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Since the output capacitor has a major role in the

-40 dB (/Decade)

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_SS

0.15 V (Therefore, at the maximum recommended input voltage of)

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Simultaneous Ramp up RA/RB>RE/

0.5 V

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 Output Voltage Range

0.5 V (to 0.86* Vin power delivery.)

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method enhances the converter’s efficiency, reduces cost

1.5 V

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connected to Vcc/LDO_out pin instead of PVin pin. Then

4.4 V

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Figure 32

Start up with Pre Bias Voltage,: 12 A (Load, Ch1:Vout)

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Intl

0.65 V

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Vin = 21V, Vin slew rate max = 3.15

1 V (/µs, Note 4)

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by eliminating a current sense resistor and any layout

0.65 V

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Normal

0.5 V

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_SS 0.15V

0.15 V

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Ratiometric Ramp up RA/RB>RE/

0.5 V

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the window comparator with upper and lower threshold of

0.6 V (and 0.45V respectively. PGood signal is high)

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PIN DIAGRAM

5m x 6 mm (POWER QFN)

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current through the RDS(on) of the Synchronous Mosfet. This

3.0 V

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is disabled. Vsns voltage is set by the voltage divider

0.3 V

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ESD Classification (HBM JESD22‐A114)

2 kV

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inductor (Δi). The optimum point is usually found between

20 % (and 50% ripple of the output current.)

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Vout 0

396 kHz (. Conversely, for operation at the maximum)

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Ratiometric Ramp up RE/RF

0 V (and Vref Margin (Vp pin floating))

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FZ 2  Fo  17.6 kHz

1.28 ms (delay, PGood signal is asserted. As long as the Vsns)

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Источники

1. PD‐97745

   технический лист; от производителя; издатель: Infineon; редакция: 2026-10-02

   Где в источнике: PD‐97745; OUTPUT VOLTAGE TRACKING AND SEQUENCING; Enable; Simultaneous Ramp up RE/RF; These components can be described as; Vcc/; Accuracy; Vin = 12V, Vin slew rate max = 1.80;  Small Size; and is compensated according to the IC temperature. So at; Since the output capacitor has a major role in the; _SS; Simultaneous Ramp up RA/RB>RE/;  Output Voltage Range; method enhances the converter’s efficiency, reduces cost; connected to Vcc/LDO_out pin instead of PVin pin. Then; Figure 32: Start up with Pre Bias Voltage,; Intl; Vin = 21V, Vin slew rate max = 3.15; by eliminating a current sense resistor and any layout; Normal; _SS 0.15V; Ratiometric Ramp up RA/RB>RE/; the window comparator with upper and lower threshold of; PIN DIAGRAM; current through the RDS(on) of the Synchronous Mosfet. This; is disabled. Vsns voltage is set by the voltage divider; ESD Classification (HBM JESD22‐A114); inductor (Δi). The optimum point is usually found between; Vout 0; Ratiometric Ramp up RE/RF; FZ 2  Fo  17.6 kHz