Характеристики
- Грузоподъёмность
- нет данных
- Вылет
- нет данных
- Повторяемость позиционирования
- нет данных
- Масса
- нет данных
- Степень защиты
- нет данных
Характеристики из источника
Строки приведены так, как их печатает производитель: без перевода, пересчёта и сравнения.
- Timeout 237ms
- 17.5 V (> Vcc >10.6V)
- Hysteresis
- 2.0 V (No Power Up)
- Open Loop
- 12.5 %
- Mode /
- 0 kHz
- RZCD =
- 1.5 mA
- After jump into latched fault mode F wait
- 200 ms (A single restart attempt after delay of internal timer)
- VRTPH UVLO Hysteresis
- 5.0 V
- VCC
- 16 V
- within 80ms
- 17.5 V (> Vcc >10.6V)
- t_PRERUN=
- 625 ms
- Chip Supply Voltage
- 16.0 V (Chip Supply Voltage)
- Reset of failure latch in run mode after
- 40 s (Reset of failure latch by UVLO or 40s in run mode)
- Bus voltage < 12.5% Shut down U
- 625 ms (Power down, restart)
- Over Voltage
- 109 %
- VRES Hysteresis
- 5.0 V
- Bus voltage < 95% of rated Timeout max A
- 80 ms (Power down, 200ms)
- VLSGD
- 10 V
- lower than VRES2 at the RES pin that indicates a
- 2500 ms (, a fault EOL2 (rectifier effect) is)
- RLoad = 10Ω+CLoad = 1nF
- 8 V (> VLSGD > 2V)
- LVS1 or LVS2 PIN set to GND
- 1.3 V
- Chip Supply Voltage 16.0 V Chip Supply Voltage
- 16.0 V
- Run frequency cannot be Timeout F
- 237 ms (Power down,latched)
- NOTE
- 17.5 V (> Vcc >10.6V)
- t < 800 ms
- 100 %
- Lowest Count of external Components
- 900 V (-Half-Bridge driver with coreless Transformer Technology)
- or VBUS > 105% Fault Conditions
- 14.1 V (< Vcc)
- < 6 mA +
- < 6 mA (+ IQGate)
- < 6 mA +
- < 6 mA (+ IGate)
- Duration is set by
- 2.5 V
- DC level of lamp voltage EOL 2 F
- 2500 ms (Power down,latched)
- Bus voltage > 109% of rated Inverter U
- 625 ms (Power down, restart)
- Capacitive Load 1 Cap Load 1 F
- 2500 ms (Power down,latched)
- VCC
- 17.5 V
- Pre-Run
- 17,5 V (> Vcc >10.6V)
- PFC Gate on Functions
- 17.5 V (> Vcc >10.6V)
Источники
- Datasheet V1.2 May 2010
технический лист; от производителя; издатель: Infineon; редакция: 2026-10-02
Где в источнике: Timeout 237ms; Hysteresis; Open Loop; Mode /; RZCD =; After jump into latched fault mode F wait; VRTPH UVLO Hysteresis; VCC; within 80ms; t_PRERUN=; Chip Supply Voltage; Reset of failure latch in run mode after; Bus voltage < 12.5% Shut down U; Over Voltage; VRES Hysteresis; Bus voltage < 95% of rated Timeout max A; VLSGD; lower than VRES2 at the RES pin that indicates a; RLoad = 10Ω+CLoad = 1nF; LVS1 or LVS2 PIN set to GND; Chip Supply Voltage 16.0 V Chip Supply Voltage; Run frequency cannot be Timeout F; * NOTE; t < 800 ms; Lowest Count of external Components; or VBUS > 105% Fault Conditions; < 6 mA +; Duration is set by; DC level of lamp voltage EOL 2 F; Bus voltage > 109% of rated Inverter U; Capacitive Load 1 Cap Load 1 F; Pre-Run; PFC Gate on Functions